Datasheet4U Logo Datasheet4U.com

CDCLVC1310 - Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator

General Description

The CDCLVC1310 is a highly versatile, low-jitter, lowpower clock fanout buffer which can distribute to ten low-jitter LVCMOS clock outputs from one of three inputs, whose primary and secondary inputs can feature differential or single-ended signals and crystal input.

Key Features

  • 1.
  • High-Performance Crystal Buffer With Ultralow Noise Floor of.
  • 169 dBc/Hz.
  • Additive Phase Noise/Jitter Performance Is 25 fsRMS (Typ. ).
  • Level Translation With 3.3-V or 2.5-V Core and 3.3-V, 2.5-V, 1.8-V, or 1.5-V Output Supply.
  • Device inputs consist of primary, secondary, and crystal inputs, and manually selectable (through pins) using the input MUX. The primary and secondary inputs can accept LVPECL, LVDS, HCSL, SSTL or LVCMOS signals and crystal inp.

📥 Download Datasheet

Datasheet Details

Part number CDCLVC1310
Manufacturer Texas Instruments
File Size 1.65 MB
Description Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator
Datasheet download datasheet CDCLVC1310 Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
CDCLD080 SURFACE MOUNT SILICON CURRENT LIMITING DIODES Central Semiconductor
CDCLD100 SURFACE MOUNT SILICON CURRENT LIMITING DIODES Central Semiconductor
CDCLD120 SURFACE MOUNT SILICON CURRENT LIMITING DIODES Central Semiconductor
CDCLD200 SURFACE MOUNT SILICON CURRENT LIMITING DIODES Central Semiconductor
CDCLD400 SURFACE MOUNT SILICON CURRENT LIMITING DIODES Central Semiconductor

Other Datasheets by Texas Instruments

Part Number Description
CDCLVC1102 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer
CDCLVC1103 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer
CDCLVC1104 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer
CDCLVC1106 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer
CDCLVC1108 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CDCLVC1310 www.ti.com SCAS917E – JULY 2011 – REVISED JANUARY 2014 Ten-Output Low-Jitter Low-Power Clock Buffer and Level Translator Check for Samples: CDCLVC1310 FEATURES 1 • High-Performance Crystal Buffer With Ultralow Noise Floor of –169 dBc/Hz • Additive Phase Noise/Jitter Performance Is 25 fsRMS (Typ.) • Level Translation With 3.3-V or 2.5-V Core and 3.3-V, 2.5-V, 1.8-V, or 1.5-V Output Supply • Device inputs consist of primary, secondary, and crystal inputs, and manually selectable (through pins) using the input MUX. The primary and secondary inputs can accept LVPECL, LVDS, HCSL, SSTL or LVCMOS signals and crystal input.