CDCI6214
Description
The CDCI6214 device is an ultra-low power clock generator. The device selects between two independent reference inputs to a phase-locked loop and generates up to four different frequencies on configurable differential output channels and also a copy of the reference clock on a LVCMOS output channel.
Key Features
- One configurable high performance, low-power PLL with four programmable outputs
- RMS jitter performance – Supports PCIe Gen1/ Gen2 / Gen3 / Gen4 without SSC
- Typical power consumption: 150mW at 1.8V(2)
- Universal clock input – Differential AC-coupled or LVCMOS: 1MHz to 250MHz – Crystal: 8MHz to 50MHz
- Flexible output frequencies – 44.1kHz to 350MHz – Glitchless output divider switching
- Fully integrated PLL, configurable loop bandwidth: 100kHz to 3MHz
- Single or mixed supply operation for level translation: 1.8V, 2.5V and 3.3V
- Configurable GPIOs – Status signals – Up to four individual output enables – Output divider synchronization
- Flexible configuration options – I2C-compatible interface: up to 400kHz – Integrated EEPROM with two pages and external select pin
- Only supports 100Ω systems
