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CDC5806 - THREE PLLs BASED CLOCK GENERATOR

Description

The CDC5806 is a clock generator which synthesizes video clocks, audio clocks, CPU clock, ASIC clock, USB clock, and a memory card clock from a 54-MHz system clock.

Three phase-locked loops (PLLs) are used to generate the different frequencies from the system clock.

Features

  • High Performance Clock Generator.
  • Clock Input Compatible With LVCMOS/LVTTL.
  • Requires a 54-MHz Input Clock to Generate Multiple Output Frequencies.
  • Low Jitter for Clock Distribution.
  • Generates the Following Clocks:.
  • VIDCLK 74.175824 MHz/54 MHz (Buffered).
  • AUDCLK 16.9344 MHz/12.288 MHz.
  • CPUCLK 64 MHz.

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Full PDF Text Transcription

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CDC5806 www.ti.com SCAS760A – MARCH 2004 – REVISED JULY 2004 THREE PLLs BASED CLOCK GENERATOR FOR DIGITAL TV APPLICATIONS FEATURES • High Performance Clock Generator • Clock Input Compatible With LVCMOS/LVTTL • Requires a 54-MHz Input Clock to Generate Multiple Output Frequencies • Low Jitter for Clock Distribution • Generates the Following Clocks: – VIDCLK 74.175824 MHz/54 MHz (Buffered) – AUDCLK 16.9344 MHz/12.288 MHz – CPUCLK 64 MHz – ASICCLK 32 MHz – USBCLK 48 MHz – MCCLK 38.4 MHz/19.2 MHz/12 MHz • Operates From Single 3.
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