CDC5801A multiplier/divider equivalent, low jitter clock multiplier/divider.
Video Graphics, Gaming
Products, Datacom, Telecom
D Accepts LVCMOS, LVTTL Inputs for
REFCLK Terminal
D Accepts Other Si.
The CDC5801A device provides clock multiplication and division from a single-ended reference clock (REFCLK) to a differential output pair (CLKOUT/CLKOUTB). The multiply and divide terminals (MULT/DIV0:1) provide selection for frequency multiplication.
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