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CDC2582 - 3.3-V Phase-Lock-Loop Clock Driver

Description

The CDC2582 is a high-performance, low-skew, low-jitter clock driver.

It uses a phase-lock loop (PLL) to precisely align the frequency and phase of the clock output signals to the differential LVPECL clock (CLKIN, CLKIN) input signals.

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Datasheet preview – CDC2582

Datasheet Details

Part number CDC2582
Manufacturer Texas Instruments
File Size 140.52 KB
Description 3.3-V Phase-Lock-Loop Clock Driver
Datasheet download datasheet CDC2582 Datasheet
Additional preview pages of the CDC2582 datasheet.
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Full PDF Text Transcription

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D Low Output Skew for Clock-Distribution and Clock-Generation Applications D Operates at 3.3-V VCC D Distributes Differential LVPECL Clock Inputs to 12 TTL-Compatible Outputs D Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency D No External RC Network Required D External Feedback Input (FBIN) Is Used to Synchronize the Outputs With the Clock Inputs CDC2582 3.
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