CD74HCT73 flip-flop equivalent, dual j-k flip-flop.
Description
* Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
* Asynchronous Reset
* Complementary Outputs
* Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
* Asynchronous Reset
* Complementary Outputs
* Buffered Inputs
* TTAyp=ic2a5lofCMAX = 60MHz at VCC = 5V, CL = 15pF,
* Fanout (Ov.
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