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CD74HC193 - Presettable Synchronous 4-Bit Up/Down Counters

Download the CD74HC193 datasheet PDF. This datasheet also covers the CD74HC192 variant, as both devices belong to the same presettable synchronous 4-bit up/down counters family and are provided as variant models within a single manufacturer datasheet.

General Description

The ’HC192, ’HC193 and ’HCT193 are asynchronously presettable BCD Decade and Binary Up/Down synchronous counters, respectively.

Presetting the counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (PL).

Key Features

  • Synchronous Counting and Asynchronous Loading.
  • Two Outputs for N-Bit Cascading.
  • Look-Ahead Carry for High-Speed Counting.
  • Fanout (Over Temperature Range) - Standard Outputs.
  • 10 LSTTL Loads - Bus Driver Outputs.
  • . . . 15 LSTTL Loads.
  • Wide Operating Temperature Range . . . -55oC to 125oC.
  • Balanced Propagation Delay and Transition Times.
  • Significant Power Reduction Compared to LSTTL Logic ICs.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CD74HC192-etcTI.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Texas Instruments

Part Number Description
CD74HC190 Synchronous Up/Down Counters
CD74HC191 Synchronous Up/Down Counters
CD74HC192 Presettable Synchronous 4-Bit Up/Down Counters
CD74HC194 4-Bit Bidirectional Universal Shift Register
CD74HC195 4-Bit Parallel Access Register

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CD54/74HC192, CD54/74HC193, CD54/74HCT193 Data sheet acquired from Harris Semiconductor SCHS163F High-Speed CMOS Logic September 1997 - Revised October 2003 Presettable Synchronous 4-Bit Up/Down Counters [ /Title (CD74 HC192 , CD74 HC193 , CD74 HCT19 3) /Subject (High Speed CMOS Logic Preset- Features • Synchronous Counting and Asynchronous Loading • Two Outputs for N-Bit Cascading • Look-Ahead Carry for High-Speed Counting • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . .