CD74HC138-Q1 decoder/demultiplexer equivalent, 3- to 8-line inverting decoder/demultiplexer.
low
power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky
TTL logic. The circuit has three binary select inputs (A0,.
D Significant Power Reduction Compared to
D Select One of Eight Data Outputs Active
Low
D I/O Port or Memory Selector .
ordering information
Y7 7 GND 8
10 Y5 9 Y6
The CD74HC138 is a high-speed silicon-gate CMOS
decoder well suited to memory address decoding or
data routing applications. This circuit features low
power consumption usually associated with CMOS cir.
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