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CD4013B - CMOS Dual D-Type Flip-Flop

General Description

The CD4013B device consists of two identical, independent data-type flip-flops.

Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs.

Key Features

  • 1 Asynchronous Set-Reset Capability.
  • Static Flip-Flop Operation.
  • Medium-Speed Operation: 16 MHz (Typical) Clock Toggle Rate at 10-V Supply.
  • Standardized Symmetrical Output Characteristics.
  • Maximum Input Current Of 1-µA at 18 V Over Full Package Temperature Range:.
  • 100 nA at 18 V and 25°C.
  • Noise Margin (Over Full Package Temperature Range):.
  • 1 V at VDD = 5 V.
  • 2 V at VDD = 10 V.
  • 2.5 V at VDD = 15 V 3 Descrip.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CD4013B SCHS023E – NOVEMBER 1998 – REVISED SEPTEMBER 2016 CD4013B CMOS Dual D-Type Flip-Flop 1 Features •1 Asynchronous Set-Reset Capability • Static Flip-Flop Operation • Medium-Speed Operation: 16 MHz (Typical) Clock Toggle Rate at 10-V Supply • Standardized Symmetrical Output Characteristics • Maximum Input Current Of 1-µA at 18 V Over Full Package Temperature Range: – 100 nA at 18 V and 25°C • Noise Margin (Over Full Package Temperature Range): – 1 V at VDD = 5 V – 2 V at VDD = 10 V – 2.5 V at VDD = 15 V 3 Description The CD4013B device consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q and Q outputs.