ADS61JB23
FEATURES
- Output Interface:
- Single-Lane and Dual-Lane Interfaces
- Maximum Data Rate of 1.6 Gbps
- Meets JESD204A Specification
- CML Outputs with Current Programmable from 2 m A
- 32 m A
- Power Dissipation:
- 440 m W at 80 MSPS in Single Lane Mode
- Power Scales Down with Clock Rate
- Input Interface: Buffered Analog Inputs
- 71.7 d BFS SNR at 70 MHz IF
- Analog Input FSR: 2 Vpp
- External and Internal (trimmed) Reference
Support
- 1.8V Supply (Analog and digital), 3.3 V Supply for Input Buffer
- Programmable Digital Gain: 0d B
- 6d B
- Straight Offset Binary or Twos plement
Output
- Package:
- 6 mm x 6 mm QFN-40
APPLICATIONS
- Wireless Base-station Infrastructure
- Test and Measurement Instrumentation
DESCRIPTION
The ADS61JB23 is a high-performance, low-power, single channel analog-to-digital converter with an integrated JESD204A output interface. Available in a 6 mm x 6 mm QFN package, with both single-lane and dual-lane output modes, the ADS61JB23 offers an unprecedented level...
