Datasheet4U Logo Datasheet4U.com

ADS6143 - Analog-to-Digital Converters

This page provides the datasheet information for the ADS6143, a member of the ADS6142 Analog-to-Digital Converters family.

Datasheet Summary

Description

ADS6145/ADS6144/ADS6143/ADS6142 (ADS614X) are a family of 14-bit A/D converters with sampling frequencies up to 125 MSPS.

The high performance and low power consumption of the ADS614X are combined in a compact 32 QFN package.

Features

  • 1.
  • Maximum Sample Rate: 125 MSPS.
  • 14-Bit Resolution with No Missing Codes.
  • 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR/SFDR Trade-Off.
  • Parallel CMOS and Double Data Rate (DDR) LVDS Output Options.
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs, and Clock Amplitude Down to 400 mVPP.
  • Clock Duty Cycle Stabilizer.
  • Internal Reference with Support for External Reference.
  • No External Decoupling Required for R.

📥 Download Datasheet

Datasheet preview – ADS6143

Datasheet Details

Part number ADS6143
Manufacturer Texas Instruments
File Size 2.52 MB
Description Analog-to-Digital Converters
Datasheet download datasheet ADS6143 Datasheet
Additional preview pages of the ADS6143 datasheet.
Other Datasheets by Texas Instruments

Full PDF Text Transcription

Click to expand full text
www.ti.com ADS6145, ADS6144 ADS6143, ADS6142 SLWS198B – JULY 2007 – REVISED MARCH 2008 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS FEATURES 1 • Maximum Sample Rate: 125 MSPS • 14-Bit Resolution with No Missing Codes • 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR/SFDR Trade-Off • Parallel CMOS and Double Data Rate (DDR) LVDS Output Options • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs, and Clock Amplitude Down to 400 mVPP • Clock Duty Cycle Stabilizer • Internal Reference with Support for External Reference • No External Decoupling Required for References • Programmable Output Clock Position and Drive Strength to Ease Data Capture • 3.3-V Analog and 1.8-V to 3.
Published: |