ADS6143 Datasheet | Texas Instruments

URES - Maximum Sample Rate: 125 MSPS - 14-Bit Resolution with No Missing Codes - 3.5 d B Coarse Gain and up to 6 d B Programmable Fine Gain for SNR/SFDR Trade-Off - Parallel CMOS and Double Data Rate (DDR) LVDS Output Options - Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs, and Clock Amplitude Down to 400 m VPP - Clock Duty Cycle Stabilizer - Internal Reference with Support for External Reference - No External Decoupling Required for References - Programmable Output Clock Position and Drive Strength to Ease Data Capture - 3.3-V Analog and 1.8-V to 3.3-V Digital Supply - 32-QFN Package (5 mm × 5 mm) - Pin patible 12-Bit Family (ADS612X) APPLICATIONS - Wireless munications Infrastructure - Software Defined Radio - Power Amplifier Linearization - 802.16d/e - Test and Measurement Instrumentation - High Definition Video - Medical Imaging - Radar Systems DESCRIPTION ADS6145/ADS6144/ADS6143/ADS6142 (ADS614X) are a family of 14-bit A/D converters with sampling frequencies up to 125 MSPS. The high performance and low power consumption of the ADS614X are bined in a pact 32 QFN package. An internal high bandwidth sample and hold and a low jitter clock buffer help to achieve high SNR and high SFDR even at high input frequencies. The ADS614X feature coarse and fine gain options to improve SFDR performance at lower full-scale analog input ranges. The digital data outputs are either parallel CMOS or DDR (Double Data Rate) LVDS. Several Features exist to ease data capture such as - controls for output clock position and output buffer drive strength, LVDS current, and internal termination programmability. The output interface type, gain, and other functions are programmed using a 3-wire serial interface. Alternatively, some functions are configured using dedicated parallel pins so the device powers up to the desired...