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74ACT11873 - DUAL 4-BIT D-TYPE LATCH

General Description

74ACT11873 DUAL 4-BIT D-TYPE LATCH WITH 3 STATE OUTPUTS SCAS096 FEBRUARY 1990 REVISED APRIL 1993 DW OR NT PACKAGE (TOP VIEW) 1C 1Q1 1Q2 1Q3 1Q4 GND GND GND GND 2Q1 2Q2 2Q3 2Q4 2C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 1OC 27 1CLR 26 1D1 25 1D2 24 1D3 23 1D4 22 VCC 21 VC

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• Inputs Are TTL-Voltage Compatible • 3-State Buffer-Type Outputs Drive Bus Lines Directly • Bus-Structured Pinout • Flow-Through Architecture to Optimize PCB Layout • Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise t• EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process • 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic Small- Outline Packages and Standard Plastic 300-mil DIPs description 74ACT11873 DUAL 4-BIT D-TYPE LATCH WITH 3–STATE OUTPUTS SCAS096 – FEBRUARY 1990 – REVISED APRIL 1993 DW OR NT PACKAGE (TOP VIEW) 1C 1Q1 1Q2 1Q3 1Q4 GND GND GND GND 2Q1 2Q2 2Q3 2Q4 2C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 1OC 27 1CLR 26 1D1 25 1D2 24 1D3 23 1D4 22 VCC 21 VCC 20 2D1 19 2D2 18 2D3 17 2D4 16 2CLR 15 2OC These dual 4-bit registers