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74ACT11593 8-BIT BINARY COUNTER WITH PARALLEL-INPUT REGISTERS AND 3-STATE OUTPUTS
SCAS203 – JUNE 1992 – REVISED APRIL 1993
• Inputs Are TTL-Voltage Compatible • Parallel Register Inputs/Binary
Counter/3-State Outputs
• Counter Has Direct Overriding Load and
Clear
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
• EPIC™ (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity at 125°C • Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
DW OR NT PACKAGE (TOP VIEW)
A/QA B/QB C/QC D/QD GND
GND
GND
GND
E/QE F/QF G/QG H/QH
1 2 3 4 5 6 7 8 9 10 11 12
24 CCK 23 CCLR 22 CCKEN 21 CCKEN 20 CLOAD 19 VCC 18 VCC 17 OE 16 OE 15 RCK 14 RCK 13 RCO
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