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54ACT16821 - 20-Bit Bus-Interface Flip-Flop

Description

These 20-bit flip-flops feature 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads.

They are particularly suitable for implementing wider buffer registers, I/O ports, parity bus interfacing, and working registers.

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54ACT16821, 74ACT16821 20ĆBIT BUSĆINTERFACE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS SCAS176A − JANUARY 1991 − REVISED APRIL 1996 D Members of the Texas Instruments Widebus Family D Inputs Are TTL-Voltage Compatible D Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity D Flow-Through Architecture Optimizes PCB Layout D Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise D EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process D Package Options Include 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings description These 20-bit flip-flops feature 3-state outputs designed specifically for driving highly-capacitiv
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