PDSP16540
feature supports the block overlapping requirements of Digital Signal Processing Systems performing Fast Fourier Transforms. It also provides wide, 32 bit, input and output buses, unlike normal byte wide FIFO's. This wide configuration supports the16 bit real and imaginary ponents of the plex data found in many DSP systems. In particular, the device can be directly connected to the PDSP16510 FFT Processor without any external logic. The FFT Processor requires the support of an input buffer when 1024 point transforms are to be continuously performed and no ining data is to remain un-processed. The number of words, which are read as a plete block, can be programmed in multiples of 32 up to a maximum of 1024. The amount of new data in this block can separately be programmed in multiples of 32 words. In this manner the percentage of new data in a plete block is under the control of the user, and the device is not restricted to only supporting the requirements of the PDSP16510. A Read Me...
