XC6VCX240T
Overview
Virtex®-6 CXT FPGAs provide designers needing power-optimized 3.75 Gb/s transceiver performance with an optimized ratio of built-in system-level blocks. These include 36 Kb block RAM/FIFOs, up to 15 Mb of block RAM, up to 768 DSP48E1 slices, enhanced mixed-mode clock management blocks, PCI Express® (GEN 1) compatible integrated blocks, a tri-mode Ethernet media access controller (MAC), up to 241K logic cells, and strong IP support.
- Advanced, high-performance, FPGA Logic
- Real 6-input look-up table (LUT) technology
- Dual LUT5 (5-input LUT) option
- LUT/dual flip-flop pair for applications requiring rich register mix
- Improved routing efficiency
- 64-bit (or 32 x 2-bit) distributed LUT RAM option
- SRL32/dual SRL16 with registered outputs option
- Powerful mixed-mode clock managers (MMCM)
- MMCM blocks provide zero-delay buffering, frequency synthesis, clock-phase shifting, input-jitter filtering, and phase-matched clock division
- 36-Kb
