W83196S-14 Datasheet | Winbond

DESCRIPTION The W83196S-14 is a Clock Synthesizer which provides all clocks required for high-speed RISC or CISC microprocessor. Twelve different frequency of CPU, and PCI clocks are externally selectable with smooth transitions. The W83196S-14 provides I2C serial bus interface to program the registers to enable or disable each clock outputs and choose the 0.5% center type spread spectrum to reduce EMI. The W83196S-14 accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. High drive PCI CLOCK outputs typically provide greater than 1V/n S slew rate into 30 p F loads. CPU CLOCK outputs typically provide better than 1V/n S slew rate into 20 p F loads as maintaining 50 ±5% duty cycle. The fixed frequency outputs as REF, 24 MHz, and 48 MHz provide better than 0.5V/n S slew rate. 2. FEATURES - Supports Pentium™ II CPUs with I C - 12 sets of CPU frequencies selection - 2 CPU clocks (one free running CPU clock) - 7 PCI synchronous clocks(one free running PCI clock) - Optional single or mixed supply: (VDDR = VDDCore = VDDP = VDD4 = 3.3V ±5%) (VDDA = VDDC = 2.5V ±5%) - Skew form CPU to PCI clock 1.5 to 4.0 n S, CPU leads. - CPU clock jitter less than 200 p S - PCI_F, PCI1: 6 clock skew less than 500 p S - Smooth frequency switch with selections from 66.8 MHz to 150 MHz CPU - I C 2-Wire serial interface and I C read back - ±0.5% center type spread spectrum function to reduce EMI - Programmable registers to enable/stop each output and select modes 2 2 (mode as Tri-state or Normal ) - MODE pin for power management - 48 MHz for USB - 24 MHz for super I/O - Packaged in 28-pin SOP -1- Publication Release Date: March 1999 Revision A1 Preliminary W83196S-14 3. BLOCK DIAGRAM VDDR REF2X X1 X2 XTAL OSC IOAPIC VDDA VDDC SEL100/66# PLL1 Spread Spectrum ¡Ò2/3/4 STOP CPUCLK_F CPUCLK1 SEL48- MODE- Latch VDDC VDDP PCI clock Divder STOP 6 PCICLK_F PCICLK(1:6) CPU_STOP# PCI_STOP# SDATA- SCLK- Contro Logic Config. Reg....