Universal 96-Point I/O
with Interruptible Event Sense
Supports 96 digital I/O lines
Each line is capable of:
• Bidirectional operation
• Input, Output or Output with Read back
• 12mA Sink Current
Generates an interrupt on signal change-of-state:
• Supports 48 event sense lines
• Software selectable edge polarity for each line
• Software enabled interrupt for each line
• Change-of-state latched for each line
Write-protection mask register for each 8-bit port
Compatible with industry standard I/O racks
Fused +5V logic supply for I/O modules
16-bit PC/104 interface
+5 volt only operation
Extended temperature range: - 40oC to +85oC
Replaces two PCM-UIO48A modules
The PCM-UIO96B is a highly versatile PC/104 input/
output module. One important feature of this card is its
ability to monitor 48 of the 96 lines for both rising and
falling digital edge transitions, latch them and then inter-
rupt the host processor notifying that a change-of-input
status has occurred. This is an efficient way of signaling
the CPU of real-time events without the burden of polling
the digital I/O points.
This PC/104 module is also compatible with industry
standard isolated I/O signal conditioning modules from
Opto-22, Gordos and others.
PC/104 Interface - The PCM-UIO96B is a PC/104
compatible stackthrough card which is I/O port mapped
on any even 32-byte boundary.
Parallel I/O Controller - WinSystems has designed the
WS16C48 Universal I/O controller ASIC to support
the various input/output and interrupt configurations.
A WS16C48 supports 48 digital I/O lines addressed
through 6 contiguous registers as ports P0-P5. A six bit
Write Mask register allows the user to disable Writes on a
byte basis to configure the group as a “Read Only” port.
Two WS16C48 chips are on the PCM-UIO96B.
Each I/O line is individually programmable for input, out-
put, or output with Read back operation. The input lines
are connected so the current status of its output port can be
read from the corresponding input port (Read back). If the
port is used as input only, then the
corresponding output port bit must be cleared. Each
output channel is latched and has an open collector
driver (with a pull-up resistor) capable of sinking 12mA
of current. This allows direct control of up to 96 opto-
isolated signal conditioning modules to a single card for
high-density I/O support.
Event Sense Operation - Each WS16C48 ASIC supports
event sense lines which can generate an interrupt when an
event occurs. These lines are the first three I/O ports on
the chip, P0-P2. Since two WS16C48s are onboard, the
PCM-UIO96B can sense a positive or negative transition
on up to 48 lines. Transition polarity is programmable and
enabled on a bit-by-bit basis. Each lines’ transition is
latched by the event so that even short duration pulses will
be recognized. An interrupt ID register is maintained for
each line for writing more efficient Interrupt Service
Interrupts - The PCM-UIO96B can generate a system
interrupt request which can be routed via a jumper block to
IRQ channels 2 - 7, 10 - 12, 14, and 15. Both WS16C48s
can generate an individual interrupt; however, the inter-
rupt requests from both chips can also be OR’ed together.
I/O Connectors - The signals from each WS16C48 are
wired to two 50-pin connectors. The 24 lines capable of
event sense operation from ports P0-P2 are wired to J1
from the first WS16C48 and J4 from the second WS16C48
chip. The other bi-directional I/O ports P3-P5 are wired to
J2 and J3 respectively.