VG26V17405F Datasheet | Vanguard Microelectronics Limited

Description VG26(V)(S)17405F 4,194,304 x 4 - Bit CMOS Dynamic RAM The device CMOS Dynamic RAM organized as 4,194,304 words x 4 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V oniy power supply. Low voltage operation is more suitable to be used on battery backup, portable electronic application. Self-Refresh is supported and CBR cycles are being performed. lt is packaged in JEDEC standard 26/24-pin plastic SOJ or TSOPII. Features - Single 5V( ± 10 %) or 3.3V(3.15V~3.6V) only power supply - High speed t RAC access time: 50/60ns - Extended - data - out(EDO) page mode access - I/O level: TTL patible (Vcc = 5V) LVTTL patible (Vcc = 3.3V) - 4 refresh modes: - RAS only refresh - CAS - before - RAS refresh - Hidden refresh - Self-refresh - Refresh interval: - Self-refresh: 2048 cycles - JEDEC standard pinout: 26/24-pin plastic SOJ and TSOPII. . Data Shee - RAS only refresh, CAS - before - RAS refresh and hidden refresh: 2048 cycles in 32ms . Document:1G5-0187 Rev.2 Page 1 Data Sheet 4 U . .. Pin Configuration 26/24-PIN 300mil Plastic SOJ VG26(V)(S)17405F 4,194,304 x 4 - Bit CMOS Dynamic RAM 26/24-PIN 300mil Plastic TSOP (ll) VCC DQ1 DQ2 WE RAS NC A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 8 9 10 11 12 13 26 25 24 23 22 21 19 18 17 16 15 14 VSS DQ4 DQ3 CAS OE A9 A8 A7 A6 A5 A4 VSS VCC DQ1 DQ2 WE RAS NC A10 A0 A1 A2 A3...