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UCD4015 - CMOS Dual 4-Stage Static Shift Register

Description

UCD4015 consists of two identical,independent,4-stage serial-input/parallel-output registers.

Each register has independent CLOCK and RESET input as well as a single serial DATA input.

”Q” outputs are available from each of the four stages on both registers.

Features

  • >.
  • 12MHz (typ. ) clock rate at 10V.
  • Maximum input current of 1μA at 18V.
  • Fully static operation.
  • 8 master-slave flip-flops plus input and output buffering.

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UNISONIC TECHNOLOGIES CO., LTD UCD4015 CMOS Dual 4-Stage Static Shift Register CMOS IC „ DESCRIPTION UCD4015 consists of two identical,independent,4-stage serial-input/parallel-output registers. Each register has independent CLOCK and RESET input as well as a single serial DATA input. ”Q” outputs are available from each of the four stages on both registers. All registers stages are D-type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one UCD4015 package or to more than 8 stages using additional UCD4015’s is possible. „ FEATURES * 12MHz (typ.
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