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TTS3816B4E - 2M x 16Bit x 4 Banks synchronous DRAM

General Description

The TTS3816B4E is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 8 x 1,048,576 words by 16 bits, fabricated with M’tec high performance CMOS technology.

Key Features

  • JEDEC standard 3.3V power supply.
  • LVTTL compatible with multiplexed address.
  • Four-banks operation.
  • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • DQM for masking.
  • Auto & self refresh.
  • 64ms refresh period (4K cycle.

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Datasheet Details

Part number TTS3816B4E
Manufacturer TwinMOS
File Size 302.99 KB
Description 2M x 16Bit x 4 Banks synchronous DRAM
Datasheet download datasheet TTS3816B4E Datasheet

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M.tec 2M x 16Bit x 4 Banks synchronous DRAM TTS3816B4E GENERAL DESCRIPTION The TTS3816B4E is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 8 x 1,048,576 words by 16 bits, fabricated with M’tec high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system www.DataSheet4U.com applications. FEATURES • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four-banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -.