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TC74AC393FN - DUAL BINARY COUNTER

Download the TC74AC393FN datasheet PDF. This datasheet also covers the TC74AC393F variant, as both devices belong to the same dual binary counter family and are provided as variant models within a single manufacturer datasheet.

Features

  • High speed: fmax = 180 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 8 µA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Pin and function compatible with 74F393 Note: xxxFN (JEDEC SOP) is not ava.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74AC393F_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Toshiba

Part Number Description
TC74AC393F Dual Binary Counter
TC74AC393FT Dual Binary Counter
TC74AC393P Dual Binary Counter
TC74AC390F Dual Decade Counter
TC74AC390FN Dual Decade Counter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74AC393P/F/FN/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC393P,TC74AC393F,TC74AC393FN,TC74AC393FT Dual Binary Counter The TC74AC393 is an advanced high speed CMOS 4-BIT BINARY COUNTER fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It contains two independent counter circuits in one package, so that counting or frequency division of eight binary bits can be achieved with one IC. This device changes state on the negative going transition of the CLOCK pulse. The counter can be reset to “0” (QA to QD = “L”) by a high at the CLEAR input regardless of other inputs.
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