74VHC165 Overview
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It consists of parallel-in or serial-in, serial-out 8-bit shift register with a gated clock input. When the SHIFT/ LOAD input is held high, the serial data input is enabled and the eight frip-frops perform serial shifting with each clock pulse.
74VHC165 Key Features
- High speed: fmax = 150 MHz (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (min)
- Power down protection is provided on all inputs
- Balanced propagation delays: tpLH ∼- tpHL
- Wide operating voltage range: VCC (opr) = 2 V to 5.5 V
- Pin and function patible with 74ALS165