TMPM3U6FYDFG Datasheet | Toshiba

description in the body of the document, the description in the body of document has higher priority. 1. The MCUs’ operation at power-on At power-on, internal state of the MCUs is unstable. Therefore, state of the pins is undefined until re- set operation is pleted. When a reset is performed by an external reset pin, pins of the MCUs that use the reset pin are unde- fined until reset operation by the external pin is pleted. Also, when a reset is performed by the internal power-on reset, pins of the MCUs that use the internal power-on reset are undefined until power supply voltage reaches the voltage at which power-on reset is valid. 2. Unused pins Unused input/output ports of the MCUs are prohibited to use. The pins are high-impedance. Generally, if MCUs operate while the high-impedance pins left open, electrostatic damage or latch-up may occur in the internal LSI due to induced voltage influenced from external noise. Toshiba remend that each unused pin should be connected to the power supply pins or GND pins via resistors. 3. Clock oscillation stability A reset state must be released after the clock oscillation bees stable. If the clock is changed to anoth- er clock while the program is in progress, wait until the clock is stable. TMPM3U6FY/FW Introduction: Notes on the description of SFR (Special Function Register) under this specification An SFR (Special Function Register) is a control register for peripheral circuits (IP). The SFR addresses of IPs are described in the chapter on memory map, and the details of SFR are given in the chapter of each IP. Definition of SFR used in this specification is in accordance with the following rules. a. SFR table of each IP as an example - SFR tables in each chapter of IP provides register names, addresses and brief descriptions. - All registers have a 32-bit unique address and the addresses of the registers are defined as follows, with some exceptions: "Base address + (Unique) address" Base Address = 0x0000_0000 Register...