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TMP91FY22F - CMOS 16-Bit Microcontroller

Download the TMP91FY22F datasheet PDF. This datasheet also covers the TMP91FY22 variant, as both devices belong to the same cmos 16-bit microcontroller family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • TMP91FY22F is a high-speed 16-bit microcontroller designed for the control of various mid- to large-scale equipment. TMP91FY22F comes in a 100-pin flat package. Listed below are the features. (1) High-speed 16-bit CPU (900/L1 CPU) x Instruction mnemonics are upward-compatible with TLCS-90/900 x 16 Mbytes of linear address space x General-purpose registers and register banks x 16-bit multiplication and division instructions; bit transfer and arithmetic instructions x Micro DMA: 4-channels (1.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TMP91FY22-Toshiba.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TMP91FY22F
Manufacturer Toshiba
File Size 263.93 KB
Description CMOS 16-Bit Microcontroller
Datasheet download datasheet TMP91FY22F Datasheet

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Other Datasheets by Toshiba

Part Number Description
TMP91FY22 CMOS 16-Bit Microcontroller
TMP91FY27 Pin Assignment and Pin Functions
TMP91FY27U CMOS 16-Bit Microcontrollers
TMP91FY28FG CMOS 16-Bit Microcontroller
TMP91FY12A CMOS 16-Bit Microcontroller

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TOSHIBA Original CMOS 16-Bit Microcontroller TLCS-900/L1 Series TMP91FY22 Preface Thank you very much for making use of Toshiba microcomputer LSIs. Before use this LSI, refer the section, “Points of Note and Restrictions”. Especially, take care below cautions. **CAUTION** How to release the HALT mode Usually, interrupts can release all halts status. However, the interrupts (NMI , INT0 to 4, INTRTC) which can release the HALT mode may not be able to do so if they are input during the period CPU is shifting to the HALT mode (for about 5 clocks of fFPH) with IDLE1 or STOP mode (IDLE2 is not applicable to this case). (In this case, an interrupt request is kept on hold internally.