Datasheet4U Logo Datasheet4U.com

TH58TEG8DCJTAK0, TC58TEG Datasheet - Toshiba

TH58TEG8DCJTAK0 NAND memory Toggle DDR1.0

Toggle DDR is a NAND interface for high performance applications which support data read and write operations using bidirectional DQS. Toggle DDR NAND has implemented ’Double Data Rate’ without a clock. It is compatible with functions and command which have been supported in conventional type NAND(i.

TH58TEG8DCJTAK0 Features

* Organization Table 1 Product Organization Parameter Part number (TOPER: 0~70℃) Part number (TOPER: -40~85℃) Device capacity Page size Block size Plane size Plane per one LUN LUN per one target Target per one device Number of valid blocks per a device (min) Number of valid blocks per a device (max)

TH58TEG8DCJTAK0, TC58TEG Datasheet

This datasheet PDF includes multiple part numbers: TH58TEG8DCJTAK0, TC58TEG. Please refer to the document for exact specifications by model.
TH58TEG8DCJTAK0 Datasheet Preview Page 2 TH58TEG8DCJTAK0 Datasheet Preview Page 3

Datasheet Details

Part number:

TH58TEG8DCJTAK0, TC58TEG

Manufacturer:

Toshiba ↗

File Size:

247.93 KB

Description:

Nand memory toggle ddr1.0.

This datasheet PDF includes multiple part numbers: TH58TEG8DCJTAK0, TC58TEG.
Please refer to the document for exact specifications by model.

📁 Related Datasheet

TH58TEG8DCJTA20 NAND memory Toggle DDR1.0 (Toshiba)

TH58TEG8DDKTA20 NAND memory Toggle DDR1.0 (Toshiba)

TH58TEG8DDKTAK0 NAND memory Toggle DDR1.0 (Toshiba)

TH58TEG7DCJTA20 NAND memory Toggle DDR1.0 (Toshiba)

TH58TEG7DCJTAK0 NAND memory Toggle DDR1.0 (Toshiba)

TH58TEG7DDKTA20 NAND memory Toggle DDR1.0 (Toshiba)

TH58TEG7DDKTAK0 NAND memory Toggle DDR1.0 (Toshiba)

TH58100FT TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS (Toshiba Semiconductor)

TAGS

TH58TEG8DCJTAK0 TC58TEG NAND memory Toggle DDR1.0 Toshiba

TH58TEG8DCJTAK0 Distributor