Datasheet4U Logo Datasheet4U.com

TC74VHC273FT - OCTAL D-TUPE FLIP-FLOP WITH CLEAR

Download the TC74VHC273FT datasheet PDF. This datasheet also covers the TC74VHC273F variant, as both devices belong to the same octal d-tupe flip-flop with clear family and are provided as variant models within a single manufacturer datasheet.

Features

  • High speed: fmax = 165 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 µA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Low noise: VOLP = 0.9 V (max).
  • Pin and function compatible with 74ALS273 Note: xxxFW (JEDEC SOP) is not available in Ja.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74VHC273F_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TC74VHC273FT
Manufacturer Toshiba
File Size 261.26 KB
Description OCTAL D-TUPE FLIP-FLOP WITH CLEAR
Datasheet download datasheet TC74VHC273FT Datasheet

Full PDF Text Transcription

Click to expand full text
TC74VHC273F/FW/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC273F,TC74VHC273FW,TC74VHC273FT,TC74VHC273FK Octal D-Type Flip-Flop with Clear The TC74VHC273 is an advanced high speed CMOS OCTAL D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Information signals applied to D inputs are transferred to the Q outputs on the positive going edge of the clock pulse. When the CLR input is held “L”, the Q outputs are at a low logic level independent of the other inputs. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage.
Published: |