Overview: TC74HC40105AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC40105AP, TC74HC40105AF
4 Bit × 16 Word FIFO Register The TC74HC40105A is a high speed CMOS 4 bit × 16 word first-in, first-out (FIFO) Strage Register fabricated with silicon gate C2MOS technology.
It achieves the high speed operation while maintaining the CMOS low power dissipation.
The device is capable of handling 16 four-bit words and it is possible to handle the input and output data at different shifting rates.
When the DATA-IN-READY (DIR) is high, data is written into the registers by a low to high transition of the SHIFT IN (SI) input. And when DATA-OUT-READY (DOR) is high, data is read out of the registers by a high to low transition of the SHIFT OUT ( SO ) input.
If the MASTER RESET (MR) is high, the DIR goes high and DOR goes low. The data in the internal registers are not changed but are declared invalid.
The TC74HC40105A can be cascaded to form longer registers or wider words.
The DATA OUTPUTs (Qn) are 3-State Outputs. When OUTPUT ENABLE ( OE ) is held high, the Qn’s are in high impedance state.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
