TC55V1864J-12 sram equivalent, 18-bit cmos sram.
low power dissipation when the device is deselected using chip enable (CE), and has an output enable input (OE) for fast memory access. Byte access is supported by upper .
such as cache memory and high speed storage. All inputs and outputs are LVTTL compatible.
The TC55V1864J/FT is available.
The TC55V1864J/FT is a 1,179,648 bit high speed CMOS static random access memory organized as 65,536 words by 18 bits and operated from a single 3.3V supply. Toshiba's advanced CMOS technology and circuit design enable hJ9!:l speed operation.
The TC5.
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