TC518129APL-12LV Datasheet, Toshiba

a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor inter.

The TC518129A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129A-LV utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed and low power stor.

TC518129APL-12

TC518129APL-10

TC518129APL-10LV

TC518129APL-80

TC518129APL-80LV

TC518129AP-10

TC518129AP-12

TC518129AP-80

TC518129AF-10

TC518129AF-12

TC518129AF-80

TC518129AFL-10

TC518129AFL-10LV