TC190 Datasheet | Toshiba

features of the family which consists of Gate Array (TC190G), Embedded Array (TC190E) and Standard Cell (TC190C) ASIC products. The TC190E is a gate array based product that incorporates the ability .. to embed large diffused cell based hardmacrocells and pilable cells (RAM, ROM, DAC, multipliers, PLLs, etc) rather than building metalized functions. This enables denser, faster, higher performance ASICS to be designed while still exhibiting quick “gate array” type turn around times. brings you not only the high quality and reliability ASICs, but fast prototype turnaround (3 day for gate array), steep production ramp-up and proven high volume manufacturing capacity. Packaging The TC190 series wide range of packaging options provide a packaging solution for any requirement. New packages are continuously being developed. Contact your Toshiba sales representative for the Toshiba Packaging Book for specific package/pin count information. Features TC190G TC190E/C - 22K - 707K usable gates up to 730K - 14 standard master sizes 21 standard master sizes - up to 512 wire bonds Same - up to 776 TAB bond pads - 62µ Inner lead bond pads Same - Typical core power - 2.63µW/gate/Mhz - 180+ primitive cells Same (scan, standard, high drive cells) - 450+ I/O cells including (hign drive Same {24m A} slew rate control high speed output buffers) piled cells - sync/async Same single, dual, triple port RAM, ROM - Hard macrocells including those for PCI bus interface are availible. Some fast multipliers, adders, ALUs, UARTS timers and special I/O cells are in development. - Ability to embed large pilable, fully Same diffused memory blocks provide higher performance and increased desnsity. TC190G Two Input NAND Gate Delay Performance ND2 Gate Delay Typical 2 3 1 Benefits - Advanced 0.6µ micron CMOS process with fast 240 gate delays. - Reduction of gate power by as much as 20 percent over 0.8µm ASICs. - 707,000 usable gates provide high levels of integration for improved performance and board...