8-BIT TTL/BTL REGISTERED TRANSCEIVER
D Compatible With IEEE Std 1194.1-1991
D TTL A Port, Backplane Transceiver Logic
(BTL) B Port
D Open-Collector B-Port Outputs Sink
D BIAS VCC Pin Minimizes Signal Distortion
During Live Insertion/Withdrawal
SCBS472G – MAY 1994 – REVISED SEPTEMBER 2001
D High-Impedance State During Power Up
and Power Down
D B-Port Biasing Network Preconditions the
Connector and PC Trace to the BTL
D TTL-Input Structures Incorporate Active
Clamping Networks to Aid in Line
52 51 50 49 48 47 46 45 44 43 42 41 40
14 15 16 17 18 19 20 21 22 23 24 25 26
The SN74FB2033K is an 8-bit transceiver featuring a split input (AI) and output (AO) bus on the TTL-level A port.
The common I/O, open-collector B port operates at backplane transceiver logic (BTL) signal levels. The
SN74FB2033K is specifically designed to be compatible with IEEE Std 1194.1-1991.
The logic element for data flow in each direction is configured by two mode inputs (IMODE1 and IMODE0 for
B-to-A, OMODE1 and OMODE0 for A-to-B) as a buffer, a D-type flip-flop, or a D-type latch. When configured
in the buffer mode, the inverted input data appears at the output port. In the flip-flop mode, data is stored on
the rising edge of the appropriate clock input (CLKAB/LEAB or CLKBA/LEBA). In the latch mode, the clock
inputs serve as active-high transparent latch enables.
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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