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SN74F382 Datasheet

Arithmetic Logic Unit/Function Generator

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SN74F382
ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR
ą
SDFS079A − D2932, MARCH 1987 − REVISED OCTOBER 1993
Fully Parallel 4-Bit ALU in 20-Pin Package
Ideally Suited for HIgh-Density Economical
Processors
Ripple-Carry (Cn+4) and Overflow (OVR)
Outputs
Arithmetic and Logic Operations Selected
Specifically to Simplify System
Implementation:
A Minus B
B Minus A
A Plus B
Five Other Functions
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
DW OR N PACKAGE
(TOP VIEW)
A1
B1
A0
B0
S0
S1
S2
F0
F1
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 A2
18 B2
17 A3
16 B3
15 Cn
14 Cn+4
13 OVR
12 F3
11 F2
description
The SN74F382 is an arithmetic logic unit (ALU)/function generator that performs eight binary arithmetic/logic
operations on two 4-bit words as shown in the function table. The exclusive-OR, AND, and OR functions of the
two Boolean variables are provided without the use of external circuits. In addition, the outputs can be cleared
(low) or preset (high) as desired. The device provides a ripple-carry (Cn+4) output to ripple the carry to the
Cn input of the next stage. It detects and indicates the two’s complement overflow condition via the overflow
(OVR) output. OVR is logically equivalent to Cn+3 Cn+4. When the SN74F382 is cascaded to handle word
lengths longer than four bits in length, only the most significant OVR is used.
The SN74F382 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
SELECTION
S2 S1 S0
ARITHMETIC/LOGIC
OPERATION
LLL
Clear
L LH
B minus A
LHL
A minus B
L HH
A plus B
HL L
AB
HLH
A+B
HH L
AB
HHH
Preset
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
2−1


Texas Instruments (TI) Electronic Components Datasheet

SN74F382 Datasheet

Arithmetic Logic Unit/Function Generator

No Preview Available !

SN74F382
ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR
ą
SDFS079A − D2932, MARCH 1987 − REVISED OCTOBER 1993
DESIGNATION
A3, A2, A1, A0
B3, B2, B1, B0
S2, S1, S0
Cn
F3, F2, F1, F0
Cn+4
OVR
VCC
GND
PIN DESIGNATIONS
PIN NO.
FUNCTION
17, 19, 1, 3
Word A inputs
16, 18, 2, 4
Word B inputs
7, 6, 5
Function-select inputs
15
Carry input for addition,
inverted carry input for subtraction
12, 11, 9, 8
Function outputs
14 Ripple-carry output
13 Overflow output
20 Supply voltage
10 Ground
logic symbol
5
S0
6
S1
7
S2
15
Cn
3
A0
4
B0
1
A1
2
B1
19
A2
18
B2
17
A3
16
B3
ALU
0
0
M7
2
(1/2) B1 [1]
3 C1 [1]
P
1
Q
P
2
Q
P
4
Q BO/CO =1
BO/CO
P (1,2) BO
Q 8 3CO
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
8
F0
9
F1
11
F2
13
OVR
14
Cn+4
12
F3
function table
Certain differences exist in the OVR and Cn+4 function table compared with similar parts from other technologies
and other vendors. No differences exist in the arithmetic modes (B minus A, A minus B, and A plus B) where
these outputs perform valuable cascade functions. There are slight differences in the other modes (clear, A + B,
A B, AB, and preset), in which these outputs strictly don’t care.
The following function table is a condensed version and assumes for An that A0, A1, A2, and A3 inputs all agree,
and for Bn that B0, B1, B2, and B3 inputs all agree. This table is intended to point out the response of these OVR
and Cn+4 outputs in all modes of operation to facilitate incoming inspection.
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443


Part Number SN74F382
Description Arithmetic Logic Unit/Function Generator
Maker Texas
Total Page 8 Pages
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