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SN74BCT29841 Datasheet

10-Bit Bus-Interface D-Type Latches

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SN54BCT29841, SN74BCT29841
10ĆBIT BUSĆINTERFACE DĆTYPE LATCHES
WITH 3ĆSTATE OUTPUTS
SCBS024C − MARCH 1989 − REVISED NOVEMBER 1993
State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Power-Up High-Impedance State
Provides Extra Bus-Driving Latches
Necessary For Wider Address / Data Paths
or Buses With Parity
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic Chip
Carriers (FK) and Flatpacks (W), and
Standard Plastic and Ceramic 300-mil DIPs
(JT, NT)
description
SN54BCT29841 . . . JT OR W PACKAGE
SN74BCT29841 . . . DW OR NT PACKAGE
(TOP VIEW)
OE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 1Q
22 2Q
21 3Q
20 4Q
19 5Q
18 6Q
17 7Q
16 8Q
15 9Q
14 10Q
13 LE
These 10-bit bus-interface latches feature 3-state
outputs designed specifically for driving highly
capacitive or relatively low-impedance loads.
They are particularly suitable for implementing
wider buffer registers, I/O ports, bidirectional bus
drivers with parity, and working registers.
The ten latches of the BCT29841 are transparent
D-type latches. When the latch-enable (LE) input
is high, the Q outputs will follow the data (D) inputs.
When LE is taken low, the Q outputs are latched
at the levels that were set up at the D inputs.
A buffered output-enable (OE) input can be used
to place the nine outputs in either a normal logic
state (high or low level) or a high-impedance state.
In the high-impedance state, the outputs neither
load nor drive the bus lines significantly. The
high-impedance state and increased drive provide
the capability to drive bus lines without need for
interface or pullup components.
SN54BCT29841 . . . FK PACKAGE
(TOP VIEW)
4 3 2 1 28 27 26
3D 5
25 3Q
4D 6
24 4Q
5D 7
23 5Q
NC 8
22 NC
6D 9
21 6Q
7D 10
20 7Q
8D 11
19 8Q
12 13 14 15 16 17 18
NC − No internal connection
The output enable (OE) does not affect the internal operation of the latches. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The SN54BCT29841 is characterized for operation over the full military temperature range of −55°C to 125°C.
The SN74BCT29841 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OE LE
D
OUTPUT
Q
L HH
H
LHL
L
LLX
HXX
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
2−1


Texas Instruments (TI) Electronic Components Datasheet

SN74BCT29841 Datasheet

10-Bit Bus-Interface D-Type Latches

No Preview Available !

SN54BCT29841, SN74BCT29841
10ĆBIT BUSĆINTERFACE DĆTYPE LATCHES
WITH 3ĆSTATE OUTPUTS
SCBS024C − MARCH 1989 − REVISED NOVEMBER 1993
logic symbol
1
OE
13
LE
EN
C1
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
10
9D
11
10D
1D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
23
1Q
22
2Q
21
3Q
20
4Q
19
5Q
18
6Q
17
7Q
16
8Q
15
9Q
14
10Q
OE 1
13
LE
1D 2
C1 23 1Q
1D
Pin numbers shown are for the DW, JT, NT, and W packages.
To Nine Other Channels
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443


Part Number SN74BCT29841
Description 10-Bit Bus-Interface D-Type Latches
Maker Texas
Total Page 5 Pages
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