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Texas Instruments (TI) Electronic Components Datasheet

SN74AS866A Datasheet

8-Bit Magnitude Comparators

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ą SN54AS866, SN74AS866A
8ĆBIT MAGNITUDE COMPARATORS
ą
SDAS183A − DECEMBER 1982 − REVISED JUNE 1990
Package Options Include Plastic Small
Outline Packages, Both Plastic and Ceramic
Chip Carriers, and Standard Plastic and
Ceramic DIPs
Input and Output Latches with Active-High
Enables
Fast Compare to Zero
Arithmetic and Logical Comparison
Open-Collector P = Q Output
description
These Advanced Schottky devices are capable of
performing high-speed arithmetic or logical
comparisons on two 8-bit binary or two’s
complement words. Three fully decoded
decisions about words P and Q are externally
available at the outputs. These devices are fully
expandable to any word length by connecting the
totem pole P>Q and P<Q outputs of each stage to
the P>Q and P<Q inputs of the next higher-order
stage. The cascading paths are implemented with
only a two-gate-level delay to reduce overall
comparison times for long words. The open-
collector P=Q output may be wire-ANDed
together.
Both input words P and Q plus all three outputs
(P>Q, P<Q, and P = Q) are equipped with latches
to provide the designer with temporary data
storage for avoiding race conditions. The enable
circuitry is implemented with minimal delay times
to enhance performance when the devices are
cascaded for longer word lengths. Each latch is
transparent when the appropriate latch enable,
PLE, QLE, or OLE is high.
SN54AS866 . . . JD PACKAGE
SN74AS866A . . . N PACKAGE
(TOP VIEW)
QLE
L/A
p < Qin
P > Qin
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
P = Qout
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 CLRQ
26 PLE
25 P7
24 P6
23 P5
22 P4
21 P3
20 P2
19 P1
18 P0
17 P < Qout
16 P > Qout
15 OLE
SN54AS866 . . . FK PACKAGE
SN74AS866A . . . FN PACKAGE
(TOP VIEW)
4 3 2 1 28 27 26
Q7 5
25 P7
Q6 6
24 P6
Q5 7
23 P5
Q4 8
22 P4
Q3 9
21 P3
Q2 10
20 P2
Q1 11
19 P1
12 13 14 15 16 17 18
The enable inputs PLE and QLE and data inputs
P and Q utilize pnp input transistors to reduce the
low-level input current requirement to typically
−0.25 mA, which minimizes loading effects.
The Q register may be cleared to zero for a fast comparison of the P word to zero.
The SN54AS866 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74AS866A is characterized for operation from 0°C to 70°C.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001
Copyright 1990, Texas Instruments Incorporated
1


Texas Instruments (TI) Electronic Components Datasheet

SN74AS866A Datasheet

8-Bit Magnitude Comparators

No Preview Available !

SN54AS866, SN74AS866A
8ĆBIT MAGNITUDE COMPARATORS
SDAS183A − DECEMBER 1982 − REVISED JUNE 1990
logic symbol
2
L/A
PLE 26
18
PO 19
P1
P2 20
P3 21
P4 22
P5 23
P6 24
25
P7 4
P>Q
P<Q 3
QLE 15
CLR Q 27
QLE 1
12
Q0 11
Q1 10
Q2 9
Q3
Q4
8
7
Q5 6
Q6
5
Q7
COMP
M [LOGIC]
M [ARITH, 2s COMP]
C1
1D 1=0 0
P
7
P > Q 3D
P < Q 3D
C3 P = Q 3D
R
C2
2D 1=0 0
Q
7
16 P > Q
17 P < Q
13 P = Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
ą
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77001


Part Number SN74AS866A
Description 8-Bit Magnitude Comparators
Maker Texas
Total Page 7 Pages
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