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Texas Instruments (TI) Electronic Components Datasheet

SN74AS1821 Datasheet

10-Bit Bus Interface Flip-Flops

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SN74AS1821
10ĆBIT BUS INTERFACE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS
Center VCC and GND Configuration Provides
Minimum Lead Inductance in High Current
Switching Applications
Provides Extra Data Width Necessary for Wider
Address/Data Paths or Buses with Parity
Outputs Have Undershoot Protection Circuitry
Power-Up High-Impedance State
Package Options include Plastic DIPS. Use the
’AS821 for Plastic and Ceramic Chip Carriers
and “Small Outline” Package Options.
Buffered Control inputs to Reduce DC Loading
Effects
description
This 10-bit flip-flop device features three-state
outputs designed specifically for driving highly
capacitive or relatively low-impedance loads. It is
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers. The ten flip-flops are
edge-triggered D-type flip-flops. On the positive
transition of the clock, the Q outputs on the
’AS1821 will be true.
A buffered output-control input can be used to
place the ten outputs in either a normal logic state
(high or low levels) or a high-impedance state. In
the high-impedance state the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and increased drive provide
the capability to drive the bus lines in a
bus-organized system without need for interface
or pull-up components. The output control (OC)
does not affect the internal operation of the
flipflops. Old data can be retained or new data can
be entered while the outputs are in the
high-impedance state.
The SN74AS1821 is characterized for operation
from 0°C to 70°C.
NT PACKAGE
(TOP VIEW)
SDAS131 − APRIL 1987
5Q
4Q
3Q
2Q
1Q
VCC
OC
1D
2D
3D
4D
5D
1
2
3
4
5
6
7
8
9
10
11
12
24 6Q
23 7Q
22 8Q
21 9Q
20 10Q
19 CLK
18 GND
17 10D
16 9D
15 8D
14 7D
13 6D
FUNCTION TABLE
(each flip-flop)
INPUTS
OC CLK D
LH
L
L
LL
X
HX X
OUTPUT
Q
H
L
QO
Z
logic symbol
OC
CLK
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
(7)
(19)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
EN
C1
1D
(5)
1Q
(4)
2Q
(3)
3Q
(2)
4Q
(1)
5Q
(24)
6Q
(23)
7Q
(22)
8Q
(21)
9Q
(20)
10Q
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard
warranty. Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1987, Texas Instruments Incorporated
1


Texas Instruments (TI) Electronic Components Datasheet

SN74AS1821 Datasheet

10-Bit Bus Interface Flip-Flops

No Preview Available !

SN74AS1821
10ĆBIT BUS INTERFACE FLIPĆFLOPS WITH 3ĆSTATE OUTPUTS
SDAS131 − APRIL 1987
logic diagram (positive logic)
OC (7)
CLK (19)
1D (8)
C1
1D
(5)
1Q
2D (9)
C1
1D
(4)
2Q
3D (10)
C1
1D
(3)
3Q
4D (11)
C1
1D
(2)
4Q
5D (12)
(13)
6D
C1
D1
C1
D1
(1)
5Q
(24)
6Q
(14)
7D
C1
D1
(23)
7Q
8D (15)
C1
D1
(22)
8Q
9D (16)
C1
D1
(21)
9Q
10D (17)
C1
D1
(20)
10Q
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN74AS1821
Description 10-Bit Bus Interface Flip-Flops
Maker Texas
Total Page 5 Pages
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