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SN54AS821A Datasheet

10-Bit Bus Interface Flip-Flops

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Functionally Equivalent to AMD’s AM29821
Provide Extra Data Width Necessary for
Wider Address/Data Paths or Buses With
Parity
Outputs Have Undershoot-Protection
Circuitry
Power-Up High-Impedance State
Buffered Control Inputs to Reduce
dc Loading Effects
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Standard Plastic
(NT) and Ceramic (JT) 300-mil DIPs
description
SN54AS821A, SN74AS821A
10-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS230A – DECEMBER 1983 – REVISED AUGUST 1995
SN54AS821A . . . JT PACKAGE
SN74AS821A . . . DW OR NT PACKAGE
(TOP VIEW)
OE
1D
2D
3D
4D
5D
6D
7D
8D
9D
10D
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 1Q
22 2Q
21 3Q
20 4Q
19 5Q
18 6Q
17 7Q
16 8Q
15 9Q
14 10Q
13 CLK
These 10-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers.
The ten flip-flops are edge-triggered D-type
flip-flops. On the positive transition of the clock
(CLK) input, the Q outputs are true to the data (D)
input.
A buffered output-enable (OE) input can be used
to place the ten outputs in either a normal logic
state (high or low logic levels) or a high-
impedance state. In the high-impedance state, the
outputs neither load nor drive the bus lines
significantly. The high-impedance state and
increased drive provide the capability to drive bus
lines without interface or pullup components.
SN54AS821A . . . FK PACKAGE
(TOP VIEW)
4 3 2 1 28 27 26
3D 5
25 3Q
4D 6
24 4Q
5D 7
23 5Q
NC 8
22 NC
6D 9
21 6Q
7D 10
20 7Q
8D 11
19 8Q
12 13 14 15 16 17 18
NC – No internal connection
OE does not affect the internal operation of the flip-flops. Previously stored data can be retained or new data
can be entered while the outputs are in the high-impedance state.
The SN54AS821A is characterized for operation over the full military temperature range of – 55°C to 125°C. The
SN74AS821A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OE CLK D
OUTPUT
Q
LH
H
LL
L
LLX
HXX
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1995, Texas Instruments Incorporated
1


Texas Instruments (TI) Electronic Components Datasheet

SN54AS821A Datasheet

10-Bit Bus Interface Flip-Flops

No Preview Available !

SN54AS821A, SN74AS821A
10-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS230A – DECEMBER 1983 – REVISED AUGUST 1995
logic symbol
OE
CLK
1
13
EN
C1
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
10
9D
11
10D
1D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
logic diagram (positive logic)
1
OE
23
1Q
22
2Q
21
3Q
20
4Q
19
5Q
18
6Q
17
7Q
16
8Q
15
9Q
14
10Q
13
CLK
2
1D
C1
1D
23
1Q
Pin numbers shown are for the DW, JT, and NT packages.
To Nine Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, TA: SN54AS821A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
SN74AS821A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN54AS821A
Description 10-Bit Bus Interface Flip-Flops
Maker Texas
Total Page 11 Pages
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