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P8M6416YL Datasheet Preview

P8M6416YL Datasheet

8M x 64 DIMM SDRAM Module

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SDRAM MODULE
Features:
Intel PC-100/PC-66 Compliant
TSOP components.
Single 3.3v +.3v power supply.
Nonbuffered fully synchronous; all signals measured
on positive edge of system clock.
Internal pipelined operation; column address can be
changed every clock cycle.
Quad internal banks for hiding row access/precharge.
64ms 4096 cycle refresh.
All inputs, outputs, clocks LVTTL compatible.
Options:
Part Number:
16 - 8Mx8 SDRAM TSOP
P8M6416YL-XX
KEY DIMM MODULE TIMING PARAMETERS
Module Component Clock
CAS
Marking Marking
Frequency Latency
-100CL3
-8A
100MHz
3
-66CL3
-10
66MHz
3
-66CL2
-10/12
66MHz
2
GENERAL DESCRIPTION
The P8M6416YL is a high performance dynamic
random-access 64MB module. This module is organized
in a x64 configuration, and utilizes quad bank architecture
with a synchronous interface. All signals are registered on
the positive edge of the clock signals CK0 through CK3.
Read and write accesses to the SDRAM are burst
oriented; accesses start at a location and continue for a
programmed number of locations in a sequence.
Accesses begin with an ACTIVE command, which is
followed by a READ or WRITE command.
_______________________________________________
ABSOLUTE MAXIMUM RATINGS:
Voltage on Vcc Supply relative to Vss.............. -1 to +4.6V
Operating Temperature TA (Ambient) ......... 25 ° to +70 °C
Storage Temperature .................................... -55 to +125 °
Power Dissipation…………………………………………8 W
Short Circuit Output Current…………………………..50 mA
Stresses beyond these may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at or beyond these conditions is
not implied. Exposure to these conditions for extended
periods may affect reliability.
P8M6416YL
____ 8M x 64 DIMM
PIN SYMBOL
1 Vss
2 DQ0
3 DQ1
4 DQ2
5 DQ3
6 Vcc
7 DQ4
8 DQ5
9 DQ6
10 DQ7
11 DQ8
12 Vss
13 DQ9
14 DQ10
15 DQ11
16 DQ12
17 DQ13
18 Vcc
19 DQ14
20 DQ15
21 NC
22 NC
23 Vss
24 NC
25 NC
26 Vcc
27 WE#
28 DQMB0
29 DQMB1
30 S0#
31 DU
32 Vss
33 A0
34 A2
35 A4
36 A6
37 A8
38 A10
39 BA1
40 Vcc
41 Vcc
42 CK0
PIN SYMBOL
43 Vss
44 DU
45 S2#
46 DQMB2
47 DQMB3
48 DU
49 Vcc
50 NC
51 NC
52 NC
53 NC
54 Vss
55 DQ16
56 DQ17
57 DQ18
58 DQ19
59 Vcc
60 DQ20
61 NC
62 NC
63 NC
64 Vss
65 DQ21
66 DQ22
67 DQ23
68 Vss
69 DQ24
70 DQ25
71 DQ26
72 DQ27
73 Vcc
74 DQ28
75 DQ29
76 DQ30
77 DQ31
78 Vss
79 CK2
80 NC
81 NC
82 SDA
83 SCL
84 Vcc
PIN SYMBOL
85 Vss
86 DQ32
87 DQ33
88 DQ34
89 DQ35
90 Vcc
91 DQ36
92 DQ37
93 DQ38
94 DQ39
95 DQ40
96 Vss
97 DQ41
98 DQ42
99 DQ43
100 DQ44
101 DQ45
102 Vcc
103 DQ46
104 DQ47
105 NC
106 NC
107 Vss
108 NC
109 NC
110 Vcc
111 CAS#
112 DQMB4
113 DQMB5
114 NC
115 RAS#
116 Vss
117 A1
118 A3
119 A5
120 A7
121 A9
122 BA0
123 A11
124 Vcc
125 CK1
126 RFU
PIN SYMBOL
127 Vss
128 CKEO
129 NC
130 DQMB6
131 DQMB7
132 RFU
133 Vcc
134 NC
135 NC
136 NC
137 NC
138 Vss
139 DQ48
140 DQ49
141 DQ50
142 DQ51
143 Vcc
144 DQ52
145 NC
146 NC
147 NC
148 Vss
149 DQ53
150 DQ54
151 DQ55
152 Vss
153 DQ56
154 DQ57
155 DQ58
156 DQ59
157 Vcc
158 DQ60
159 DQ61
160 DQ62
161 DQ63
162 Vss
163 CK3
164 NC
165 SA0
166 SA1
167 SA2
168 Vcc
CAPACITANCE: (This parameter is sampled. VCC = +3.3V ± 0.3V; f = 1 MHz)
Parameter
Symbol
Input Capacitance: A0 - A10, BAO, RAS#, CAS#, WE#,
Input Capacitance: CK0-CK3
Input Capacitance: S0#, S2#
Input Capacitance: DQMB0#, DQMB7
Input Capacitance: SQL, SA0-SA2
Input/Output Capacitance: DQ0-DQ63, SDA
Input/Output Capacitance: CKE0
Cl1
Cl2
Cl3
Cl4
Cl5
CIO
CI6
Max
88
25
45
14
6
10
90
Units
pF
pF
pF
pF
pF
PF
PF
__________________________________________________________________________________________________
P8M6416YL
1 SpecTek reserves the right to change products
Rev: 2/2/99
or specifications without notice. ©1999 SpecTek




SpecTek

P8M6416YL Datasheet Preview

P8M6416YL Datasheet

8M x 64 DIMM SDRAM Module

No Preview Available !

P8M6416YL
DC ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS:
Parameter
Symbol
Min
Supply Voltage
Vcc/Vccq
3.0
Input High (Logic 1) Voltage, All inputs
Input Low (Logic 0) Voltage, All inputs
Input Leakage Current Any input = 0V < VIN < Vcc
All other pins not under test = 0V
Output Leakage Current DQs are disabled; 0V < VOUT < VccQ
Output High Voltage (IOUT = -4 mA)
Output Low Voltage (IOUT = 4 mA)
VIH 2.0
VIL -0.3
II -10
I2 -20
I3 -30
IOZ -10
VOH 2.4
VOL
Max
3.6
Vcc + .3
0.8
10
20
30
10
0.4
Units
V
V
V
uA
uA
V
V
ICC OPERATING CONDITIONS AND MAXIMUM LIMITS: Vcc = 3.3V ± 10%V, Temp. = 25° to 70 °C
Supply Current
Symbol -8A -10 -12 Units Notes
OPERATING CURRENT: ACTIVE mode, burst CL= 2
= 1, READ or WRITE, tRC > tRC (MIN), one
CL = 3
bank active,
Icc1 1600
mA 1, 2, 3
Icc1 1760 1680 1520 mA 1, 2, 3
STANDBY CURRENT: POWER-DOWN mode, tCK = 15ns
Icc2 80 80 80 mA
CKE = LOW, no accesses in progress
CKL = LOW Icc2 48 48 48 mA
STANDBY CURRENT: CS# = HIGH, CKE = HIGH,
tCK = 15ns, both banks idle
Icc3
560 560 560
mA
3, 4
STANDBY CURRENT: CS# = HIGH, CKE = HIGH, tCK = 15ns,
both banks active after tRCD met, no accesses in progress.
Icc4
560 560 560
mA
3, 4
OPERATING CURRENT: BURST mode after
tRCD met, continuous burst, READ, WRITE,
tCK > tCK MIN, other bank active.
CL= 2
CL = 3
Icc5 2240 2080 1950 mA 1, 2, 3
Icc5 2720 2400 2240 mA 1, 2, 3
AUTO REFRESH CURRENT tRC > tRC (MIN)
Icc6 3600 3200 2880 mA 1, 2, 3
NOTES:
1. Icc is dependent on output loading and cycle rates. Specified values are obtained with minimum cycle time and the
outputs open.
2. The Icc current will decrease as the CAS latency is reduced. This is because maximum cycle rate is slower as CAS
latency is reduced.
3. Address transitions average one transition every 30ns.
4. Other input signals are allowed to transition no more than once in any 30ns period.
AC ELECTRICAL CHARACTERISTICS: Vcc = 3.3V ± 10%V, Temp. = 25° to 70°C (CL = CAS Latency)
AC CHARACTERISTICS
-8A -8A -10 -10 -12 -12
PARAMETER
SYM MIN MAX MIN MAX MIN MAX
Access time from CLK (positive edge) CL = 3 tAC
6
9
9
Access time from CLK (positive edge) CL = 2 tAC
9 10
Address hold time
tAH 1
1.5 1.5
Address setup time
tAS 2 3 3
CLK high level width
tCH 3 4 4
CLK low level width
tCL 3 4 4
Clock cycle time CL = 3
tCK 10 15 15
Clock cycle time CL = 2
tCK 15 15
CKE hold time
tCKH 1
1.5 1.5
CKE setup time
tCKS 2 3 3
CS#, RAS#, CAS#, WE#, DQM hold time
tCMH 1
1.5 1.5
CS#, RAS#, CAS#, WE#, DQM setup time
tCMS 2
3
3
Data-in hold time
tDH 1
1.5 1.5
Data-in setup time
tDS 2 3 3
Data-out high impedance time
tHZ 9 9 12
Data-out low impedance time
tLZ 2 2 2
Data-out hold time
tOH 3 3 3
ACTIVE to PRECHARGE command period
tRAS 50 16K 60 16K 72 16K
AUTO REFRESH and ACTIVE to ACTIVE
tRC 10
8
8
command period
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tck
NOTES
1
__________________________________________________________________________________________________
P8M6416YL
2 SpecTek reserves the right to change products
Rev: 2/2/99
or specifications without notice. ©1999 SpecTek


Part Number P8M6416YL
Description 8M x 64 DIMM SDRAM Module
Maker SpecTek
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P8M6416YL Datasheet PDF






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