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P8M6416YL - (P8M648YLx / P8M6416YLEx) 8M/16M x 64 DIMM SDRAM Module

This page provides the datasheet information for the P8M6416YL, a member of the P8M648YLE (P8M648YLx / P8M6416YLEx) 8M/16M x 64 DIMM SDRAM Module family.

Datasheet Summary

Description

The P8M648YL, P8M648YLE, P16M6416YL, and P16M6416YLE are high performance dynamic randomaccess 64MB and 128MB modules respectively.

These modules are organized in a x64 configuration, and utilize quad bank architecture with a synchronous interface.

Features

  • P8M648YLE, P16M6416YLE 8M, 16M x 64 DIMM PC-100 and PC133 Compatible JEDEC.
  • Standard 168-pin , dual in-line memory Module (DIMM) TSOP components. Single 3.3v +.3v power supply. Nonbuffered fully synchronous; all signals measured on positive edge of system clock. Internal pipelined operation; column address can be changed every clock cycle. Quad internal banks for hiding row access/precharge. 64m.

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Datasheet preview – P8M6416YL

Datasheet Details

Part number P8M6416YL
Manufacturer SpecTek
File Size 64.41 KB
Description (P8M648YLx / P8M6416YLEx) 8M/16M x 64 DIMM SDRAM Module
Datasheet download datasheet P8M6416YL Datasheet
Additional preview pages of the P8M6416YL datasheet.
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Full PDF Text Transcription

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P8M648YL, P16M6416YL Preliminary Release V1 SDRAM MODULE Features: • • • • • • • • • P8M648YLE, P16M6416YLE 8M, 16M x 64 DIMM PC-100 and PC133 Compatible JEDEC – Standard 168-pin , dual in-line memory Module (DIMM) TSOP components. Single 3.3v +.3v power supply. Nonbuffered fully synchronous; all signals measured on positive edge of system clock. Internal pipelined operation; column address can be changed every clock cycle. Quad internal banks for hiding row access/precharge. 64ms 4096 cycle refresh. All inputs, outputs, clocks LVTTL compatible.
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