SI5356 Datasheet | Silicon Labs

I 2C P ROGRAMMABLE , A NY - R A TE 1- 200 M H Z , Q U A D F REQUENCY 8-O UTPUT C LOCK G ENERATOR Features - - - - - - - - - Generates any frequency from 1 to - 200 MHz on each of the 4 output banks Programmable frequency configuration - Guaranteed 0 ppm frequency synthesis error for any bination of frequencies - 25 or 27 MHz xtal or 5- 200 MHz input clk Eight CMOS clock outputs Easy to use programming software - Configurable “triple A” spread spectrum: - any clock, any frequency, and with any - spread amount Programmable output phase adjustment - with resolution of 20 ps per step - Interrupt pin indicates LOS or LOL OE pin disables all outputs or per bank OE control via I2C Low jitter: 50 ps pk-pk (typ), 100 ps pk-pk period jitter (max) Excellent PSRR performance eliminates need for external power supply filtering Low power: 45 m A Core VDD: 1.8, 2.5, or 3.3 V Separate VDDO for each bank of outputs: 1.8, 2.5, or 3.3 V Small size: 4x4 mm 24-QFN Industrial temperature range: - 40 to +85 °C Ordering Information: See page 20. Pin Assignments Applications - - - - Printers Audio/video Residential gateways DSLAM - - - - Femtocells Storage area networks Switches/routers Servers XAXA1 1 XBXB2 2 I2C_LSB P1 3 3 Top Top View View CLK0 CLK0 GND GND CLK1 CLK1 VDD VDD VDDOA...