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Si5348 - Network Synchronizer

Description

3.

The Si5348 offers three DSPLLs that have identical performance and flexibility which can be independently configured and controlled through the serial interface.

Features

  • Three independent DSPLLs in a single monolithic IC supporting flexible SyncE/ IEEE 1588 and SETS architectures.
  • Ultra-low jitter of 100 fs.
  • Input frequency range:.
  • External crystal: 48 to 54 MHz.
  • REF clock: 5 to 250 MHz.
  • Diff clock: 8 kHz to 750 MHz.
  • LVCMOS clock: 8 kHz to 250 MHz.
  • Output frequency range:.
  • Differential: 1 PPS to 712.5 MHz.
  • LVCMOS: 1 PPS to 250 MHz.
  • Meets the requirements of:.

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Full PDF Text Transcription

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Si5348 Rev D Data Sheet Network Synchronizer for SyncE/ 1588 PTP Telecom Boundary (T-BC) and Slave (T-SC) Clocks The Si5348 combines the industry’s smallest footprint and lowest power network synchronizer clock with unmatched frequency synthesis flexibility and ultra-low jitter. The Si5348 is ideally suited for wireless backhaul, IP radio, small and macro cell wireless communications systems, and data center switches requiring both traditional and packet based network synchronization. The three independent DSPLLs™ are individually configurable as a SyncE PLL, IEEE 1588 DCO or a general-purpose PLL for processor/FPGA clocking. The Si5348 can also be used in legacy SETS systems needing Stratum 3/3E compliance.
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