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SI53308 - DUAL 1:3 LOW-JITTER BUFFER/LEVEL TRANSLATOR

Description

The Si53308 is an ultra low jitter six output differential buffer with pin-selectable output clock signal format and divider selection.

The device is a dual 1:3 buffer providing the functionality of two independent buffers in a single IC.

Features

  • 6 differential or 12 (in phase).
  • Loss of signal (LOS) monitors for LVCMOS outputs loss of input clock.
  • Ultra-low additive jitter: 45 fs rms.
  • Independent VDD and VDDO :.
  • Wide frequency range: 1 to 725 MHz 1.8/2.5/3.3 V.
  • Any-format input with pin selectable.
  • Selectable LVCMOS drive strength to output formats: LVPECL, low power tailor jitter and EMI performance LVPECL, LVDS, CML, HCSL, LVCMOS.
  • Synchronous output enable.
  • Output clock division: /1,.

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Datasheet preview – SI53308

Datasheet Details

Part number SI53308
Manufacturer Silicon Laboratories
File Size 1.69 MB
Description DUAL 1:3 LOW-JITTER BUFFER/LEVEL TRANSLATOR
Datasheet download datasheet SI53308 Datasheet
Additional preview pages of the SI53308 datasheet.

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Full PDF Text Transcription

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Si53308 DUAL 1:3 LOW-JITTER BUFFER/LEVEL TRANSLATOR Features  6 differential or 12 (in phase)  Loss of signal (LOS) monitors for LVCMOS outputs loss of input clock  Ultra-low additive jitter: 45 fs rms  Independent VDD and VDDO :  Wide frequency range: 1 to 725 MHz 1.8/2.5/3.
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