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SI53305 Datasheet, Silicon Laboratories

SI53305 translator equivalent, 1:10 low jitter universal buffer/level translator.

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SI53305 Datasheet

Features and benefits


* 10 differential or 20 LVCMOS outputs
* Low output-output skew: <70 ps
* Ultra-low additive jitter: 45 fs rms
* Low propagation delay variation:
* .

Application


* High-speed clock distribution
* Ethernet switch/router
* Optical Transport Network (OTN)
* SONET/SDH <.

Description

The Si53305 is an ultra low jitter ten output differential buffer with pin-selectable output clock signal format and individual OE. The Si53305 features a 2:1 mux with glitchless switching, making it ideal for redundant clocking applications. The Si5.

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TAGS

SI53305
110
LOW
JITTER
UNIVERSAL
BUFFER
LEVEL
TRANSLATOR
SI5330
Si53301
SI53301
Silicon Laboratories

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