SI5330 translator equivalent, low-skew clock buffer/level translator.
*
*
*
*
18 17 16 15 14 13 7 8 9 10 11 12
*
Supports single-ended or differential input clock signals Generates four differential (LVPECL, LVDS, H.
*
2 3
High Speed Clock Distribution
* Ethernet Switch/Router
* SONET / SDH
*
PCI Express 2.0/3.0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.1. VDD and VDDO Supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.2. Loss Of Signal Indic.
Image gallery
TAGS
Download (Size : 293.02KB)