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SI53119 Datasheet

Manufacturer: Silicon Laboratories
SI53119 datasheet preview

Datasheet Details

Part number SI53119
Datasheet SI53119-SiliconLaboratories.pdf
File Size 1.29 MB
Manufacturer Silicon Laboratories
Description 19-OUTPUT PCIE GEN 3 BUFFER
SI53119 page 2 SI53119 page 3

SI53119 Overview

The Si53119 is a 19-output, low-power HCSL differential clock buffer that meets all of the performance requirements of the Intel DB1200ZL specification. The device is optimized for distributing refere nce clocks for Intel® QuickPath Interconnect (Intel QPI), PCIe Gen 1/Gen 2/Gen 3/ Gen 4, SAS, SATA, and Intel Scalable Memory Interconnect (Intel SMI) applications. The VCO of the device is optimized to support 100 MHz...

SI53119 Key Features

  • Nineteen 0.7 V low-power, push
  • PLL or bypass mode
  • Spread spectrum tolerable
  • 100 MHz /133 MHz PLL
  • 1.05 to 3.3 V I/O supply voltage
  • operation, supports PCIe and QPI
  • PLL bandwidth SW SMBUS programming overrides the latch
  • Extended Temperature
  • 40 to 85 °C
  • Separate VDDIO for outputs

Si53119 from other manufacturers

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Brand Logo Part Number Description Other Manufacturers
Skyworks Logo Si53119 19-OUTPUT PCIE GEN-3 BUFFER Skyworks
Skyworks Logo Si53119-A03A 19-OUTPUT PCIE GEN-3 BUFFER Skyworks
Silicon Laboratories logo - Manufacturer

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