C8051F368 Overview
2.7 3.6 V (50 MIPS) 3.0 3.6 V (100 MIPS) - Power saving suspend and shutdown modes High Speed 8051 µC Core - Pipelined instruction architecture; In-system programmable in 1024-byte Sectors 1024 bytes are reserved in the 32 kB devices Digital Peripherals - up to 39 Port I/O; All 5 V tolerant with high sink cur- rent - Hardware enhanced UART, SMBus™, and enhanced SPI™ serial ports - Four general purpose 16-bit...