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C8051F206 Datasheet Preview

C8051F206 Datasheet

Mixed-Signal 8KB ISP FLASH MCU

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C8051F206
C8051F220/1/6
C8051F230/1/6
Mixed-Signal 8KB ISP FLASH MCU Family
ANALOG PERIPHERALS
- SAR ADC
12-bit Resolution (‘F206)
8-Bit Resolution (‘F220/1/6)
• ±1/4 LSB INL (8-bit) and ±2 LSB INL (12-bit)
Up to 100ksps
Up to 32 Channel Input Multiplexer; Each Port
I/O Pin can be an ADC Input
- Two Comparators
16 Programmable Hysteresis States
Configurable to Generate Interrupts or Reset
- VDD Monitor and Brown-out Detector
ON-CHIP JTAG DEBUG
- On-Chip Debug Circuitry Facilitates Full Speed, Non-
intrusive In-system Debug (No Emulator Required!)
- Provides Breakpoints, Single-Stepping, Watchpoints,
Stack Monitor
- Inspect/Modify Memory and Registers
- Superior Performance to Emulation Systems Using
ICE-Chips, Target Pods, and Sockets
- Complete, Low Cost Development Kit.
HIGH SPEED 8051 µC Core
- Pipelined Instruction Architecture; Executes 70% of
Instructions in 1 or 2 System Clocks
- Up to 25MIPS Throughput with 25MHz Clock
- Expanded Interrupt Handler
MEMORY
- 256 Bytes Internal Data RAM
- 1024 Bytes XRAM (available on ‘F206/226/236)
- 8k Bytes FLASH; In-System Programmable in 512
byte Sectors
DIGITAL PERIPHERALS
- Four byte wide Port I/O; All are 5V tolerant
- Hardware UART and SPI bus
- 3 General Purpose 16-Bit Counter/Timers
- Dedicated Watch-Dog Timer
- Bi-directional Reset
- System Clock: Internal Programmable Oscillator,
External Crystal, External RC, or External Clock
SUPPLY VOLTAGE ................ 2.7V to 3.6V
- Typical Operating Current: 10mA @ 25MHz
- Multiple Power Saving Sleep and Shutdown Modes
(48-Pin TQFP and 32-Pin LQFP Version Available)
Temperature Range: –40°C to +85°C
ANALOG PERIPHERALS
SAR
PGA ADC
DIGITAL I/O
SPI Bus
UART
Timer 0
++
--
VOLTAGE
COMPARATORS
Timer 1
Timer 2
HIGH-SPEED CONTROLLER CORE
8051 CPU
(25MIPS)
CLOCK
CIRCUIT
JTAG
EMULATION
CIRCUITRY
8K x 8 1280 x 8
ISP FLASH SRAM
22 INTERRUPTS
SANITY
CONTROL
Rev. 1.4 11/03
Copyright © 2003 by Silicon Laboratories




Silicon Laboratories

C8051F206 Datasheet Preview

C8051F206 Datasheet

Mixed-Signal 8KB ISP FLASH MCU

No Preview Available !

C8051F206
C8051F220/1/6
C8051F230/1/6
TABLE OF CONTENTS
1. SYSTEM OVERVIEW ........................................................................................................6
Table 1.1.1. Product Selection Guide ................................................................................................................6
Figure 1.1. C8051F206, C8051F220 and C8051F226 Block Diagram (48 TQFP) ..........................................7
Figure 1.2 C8051F221 Block Diagram (32 LQFP) ...........................................................................................8
Figure 1.3 C8051F230 and C8051F236 Block Diagram (48 TQFP) ................................................................9
Figure 1.4 C8051F231 Block Diagram (32 LQFP) .........................................................................................10
1.1. CIP-51TM Microcontroller Core.............................................................................................................11
Figure 1.5. Comparison of Peak MCU Throughputs.......................................................................................11
Figure 1.6. On-Board Clock and Reset............................................................................................................12
1.2. On-Board Memory.................................................................................................................................13
Figure 1.7. On-Board Memory Map................................................................................................................13
1.3. JTAG .....................................................................................................................................................14
Figure 1.8. Debug Environment Diagram .......................................................................................................14
1.4. Digital/Analog Configurable I/O ...........................................................................................................15
Figure 1.9. Port I/O Functional Block Diagram ..............................................................................................15
1.5. Serial Ports.............................................................................................................................................15
1.6. Analog to Digital Converter ..................................................................................................................16
Figure 1.10. ADC Diagram .............................................................................................................................16
1.7. Comparators...........................................................................................................................................17
Figure 1.11. Comparator Diagram...................................................................................................................17
2. ABSOLUTE MAXIMUM RATINGS*.............................................................................18
3. GLOBAL DC ELECTRICAL CHARACTERISTICS ...................................................19
4. PINOUT AND PACKAGE DEFINITIONS ....................................................................20
Table 4.1 Pin Definitions.................................................................................................................................20
Figure 4.1 TQFP-48 Pin Diagram ....................................................................................................................22
Figure 4.2 LQFP-32 Pin Diagram ....................................................................................................................23
Figure 4.3 TQFP-48 Package Drawing ............................................................................................................24
Figure 4.4 LQFP-32 Package Drawing ...........................................................................................................25
5. ADC (8-Bit, C8051F220/1/6 Only) ....................................................................................26
Figure 5.1. 8-Bit ADC Functional Block Diagram..........................................................................................26
5.1. Analog Multiplexer and PGA................................................................................................................26
5.2. ADC Modes of Operation......................................................................................................................26
Figure 5.2. 12-Bit ADC Track and Conversion Example Timing...................................................................27
Figure 5.3. AMX0SL: AMUX Channel Select Register .................................................................................28
Figure 5.4. ADC0CF: ADC Configuration Register .......................................................................................29
Figure 5.5. ADC0CN: ADC Control Register (C8051F220/1/6 and C8051F206) .........................................30
Figure 5.6. ADC0H: ADC Data Word Register (C8051F220/1/6 and C8051F206)......................................31
5.3. ADC Programmable Window Detector.................................................................................................31
Figure 5.7. ADC0GTH: ADC Greater-Than Data Register (C8051F220/1/6 and C8051F206) .....................31
Figure 5.8. ADC0LTH: ADC Less-Than Data Byte Register (C8051F220/1/6 and C8051F206)..................31
Figure 5.9. 8-Bit ADC Window Interrupt Examples.......................................................................................32
Table 5.1. 8-Bit ADC Electrical Characteristics..............................................................................................33
6. ADC (12-Bit, C8051F206 Only) ........................................................................................34
Figure 6.1. 12-Bit ADC Functional Block Diagram........................................................................................34
6.1. Analog Multiplexer and PGA................................................................................................................34
6.2. ADC Modes of Operation......................................................................................................................34
Figure 6.2. 12-Bit ADC Track and Conversion Example Timing...................................................................35
Figure 6.3. AMX0SL: AMUX Channel Select Register .................................................................................36
Figure 6.4. ADC0CF: ADC Configuration Register (C8051F220/1/6 and C8051F206) ................................37
Figure 6.5. ADC0CN: ADC Control Register (C8051F220/1/6 and C8051F206) .........................................38
Figure 6.6. ADC0H: ADC Data Word MSB Register (C8051F206) .............................................................39
Rev. 1.4
2


Part Number C8051F206
Description Mixed-Signal 8KB ISP FLASH MCU
Maker Silicon Laboratories
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