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SC92031L - 10/100 MBPS INTEGRATED PCI ETHERNET MEDIA ACCESS CONTROLLER AND PHYSICAL LAYER

Download the SC92031L datasheet PDF. This datasheet also covers the SC92031 variant, as both devices belong to the same 10/100 mbps integrated pci ethernet media access controller and physical layer family and are provided as variant models within a single manufacturer datasheet.

General Description

The SC92031 is a highly-integrated and cost-effective single-chip Fast Ethernet NIC controller.

It fully complies with PCI 2.2 and IEEE 802.3u 100Base-T specifications.

It supports both half-duplex and full duplex operation, as well as for full-duplex flow control.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SC92031-SilanSemiconductors.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number SC92031L
Manufacturer Silan Semiconductors
File Size 470.56 KB
Description 10/100 MBPS INTEGRATED PCI ETHERNET MEDIA ACCESS CONTROLLER AND PHYSICAL LAYER
Datasheet download datasheet SC92031L Datasheet

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SC92031 10/100 MBPS INTEGRATED PCI ETHERNET MEDIA ACCESS CONTROLLER AND PHYSICAL LAYER
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SC92031 10/100 MBPS INTEGRATED PCI ETHERNET MEDIA ACCESS CONTROLLER AND PHYSICAL LAYER DESCRIPTION The SC92031 is a highly-integrated and cost-effective single-chip Fast Ethernet NIC controller. It fully complies with PCI 2.2 and IEEE 802.3u 100Base-T specifications. It supports both half-duplex and full duplex operation, as well as for full-duplex flow control. It also supports Advanced Configuration Power management Interface (ACPI), PCI power management and remote wake-up events including AMD Magic Packet, Link Change, and Microsoft® wake-up frame. The SC92031 provides glue less 32-bit bus master interface for PCI, boot ROM interface, as well as physical media interface for 100BASETX of IEEE 802.3u and 10BASE-T of 802.3. It also supports shared Boot ROM pins & clock run pin.