HYS64V2100GCU-10 module equivalent, 3.3v 2m x 64-bit sdram module 3.3v 2m x 72-bit sdram module.
during tck(min.) and when No Operation commands are registered on every rising clock edge during tRC(min). 2. The specified values are valid when data inputs (DQ’ s) are.
1 bank 2M x 64, 2M x 72 organisation Optimized for byte-write non-parity or ECC applications Fully PC66 layout compatibl.
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