K7A161831B pb-free equivalent, 18mb b-die sync sram specification 100tqfp with pb / pb-free.
* Synchronous Operation.
* 2 Stage Pipelined operation with 4 Burst.
* On-Chip Address Counter.
* Self-Timed Write Cycle.
* On-Chip Address and Contro.
where Product failure could result in loss of life or personal or physical harm, or any military or defense application,.
The K7A163631B and K7A161831B are 18,874,368-bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC based System. It is organized as 512K(1M) words of 36(18) bits and integrates address an.
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